发明名称 POWER SUPPLY DEVICE
摘要 PROBLEM TO BE SOLVED: To lower the voltage of a secondary voltage output terminal to 0V without being locked at intermediate voltage and prevent malfunction of a connected device when the voltage of a supply voltage source drops or when overcurrent operation is detected. SOLUTION: The output signal Vu of a comparator 24 is entered to either input of a latch circuit 33, and the output signal Vm of a third detection circuit 47 is inputted to the other input of the latch circuit 33. Thus, the operating/stopped state of an amplifier 27 is controlled by the output signal Ve of the latch circuit 33. Once the signal Vu is brought into "HI" state when the signal Vm is in "HI" state, the signal Ve is held in "HI" state by the latch circuit 33. Thus, the voltage of the signal Vb can be lowered to the vicinity of 0V without being locked at an intermediate voltage lower than a preset voltage. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005160163(A) 申请公布日期 2005.06.16
申请号 JP20030392461 申请日期 2003.11.21
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KATAOKA SHINICHIRO
分类号 H02M3/155;(IPC1-7):H02M3/155 主分类号 H02M3/155
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