发明名称 SEMICONDUCTOR DEVICE AND ITS FABRICATING PROCESS
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device capable of lowering the threshold voltage of both an n-type MIS transistor and a p-type MIS transistor while suppressing degradation in electric characteristics of the MIS transistor or lowering in yield thereof, and to provide its fabricating process. SOLUTION: An n-type MIS transistor Q<SB>1</SB>and a p-type MIS transistor Q<SB>2</SB>are fabricated on a semiconductor substrate 1. Gate electrode 9a of the n-type MIS transistor Q<SB>1</SB>is formed of a tantalum nitride film 6a rendered amorphous and a tungsten film 8. On the other hand, gate electrode 9b of the p-type MIS transistor Q<SB>2</SB>is formed of a crystallized tantalum nitride film 6c and the tungsten film 8. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005158885(A) 申请公布日期 2005.06.16
申请号 JP20030392697 申请日期 2003.11.21
申请人 RENESAS TECHNOLOGY CORP 发明人 KADOSHIMA MASARU
分类号 H01L21/28;H01L21/8238;H01L27/092;H01L29/423;H01L29/49;H01L29/78;(IPC1-7):H01L21/823 主分类号 H01L21/28
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