发明名称 |
CHANNEL CLEAR ACCESS SIGNAL GENERATION CIRCUIT AND ELECTRONIC EQUIPMENT |
摘要 |
PROBLEM TO BE SOLVED: To obtain a channel clear access signal generation circuit capable of preventing delay in processing and simplifying a circuit. SOLUTION: The channel clear access signal generation circuit comprises a first carrier sense signal generation circuit for outputting a first carrier sense signal only for prescribed time when the level of a reception signal is equal to or higher than a first threshold; a second carrier sense signal generation circuit for outputting a second carrier sense signal when the level of the reception signal is equal to or higher than a second threshold that is higher than the first one, and for stopping the output of the second carrier sense signal when the level of the reception signal becomes less than the second threshold; a synchronous timing signal generation circuit for outputting a synchronous timing signal when synchronous timing is detected from the reception signal; and a channel clear access signal determination circuit for outputting the logical sum of the first and second carrier sense signals and the synchronous timing signal as a channel clear access signal. COPYRIGHT: (C)2005,JPO&NCIPI
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申请公布号 |
JP2005159760(A) |
申请公布日期 |
2005.06.16 |
申请号 |
JP20030395994 |
申请日期 |
2003.11.26 |
申请人 |
NTT ELECTORNICS CORP |
发明人 |
JIKUHARA SHOTARO;SASAKI MAKOTO |
分类号 |
H04J11/00;H04L12/28;H04W76/02;(IPC1-7):H04J11/00;H04Q7/38 |
主分类号 |
H04J11/00 |
代理机构 |
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