| 摘要 |
A graphics plotting apparatus which can realize both optimum division of a processing system into blocks and optimum arrangement of the blocks and can be augmented in terms of the performance for a three-dimensional graphics plotting process. The graphics plotting apparatus includes a logic circuit block and a memory block having a capacity sufficient to store display data to be displayed. Both blocks are built in the same chip. An input buffer having a capacity for more than one apex of a three-dimensional graphics plotting primitive is provided, and an interface for transfer of data to and from the outside and the input buffer are arranged on one side of the logic circuit block. A DDA setup circuit is arranged adjacent the input buffer, and a triangle DDA circuit is arranged adjacent the DDA setup circuit. A pair of texture processing circuit blocks are arranged adjacent the triangle DDA circuit. The block sizes of the texture processing circuit blocks are set greater than those of the DDA setup circuit and the triangle DDA circuit.
|
