发明名称 |
MONOLITHIC INTEGRATED ENHANCEMENT MODE AND DEPLETION MODE FIELD EFFECT TRANSISTORS AND METHOD OF MAKING THE SAME |
摘要 |
A depletion mode (D-mode) field effect transistor (FET) is monolithically integrated with an enhancement mode (E-mode) FET in a multi-layer structure. The multi-layer structure includes a channel layer overlaid by a barrier layer overlaid by an ohmic contact layer. Source and drain contacts of the D-mode and E-mode FETs are coupled to the ohmic contact layer. A gate contact of the D-mode and E-mode FETs is coupled to the barrier layer. An amorphized region is provided beneath the E-mode gate contact within the barrier layer. The amorphized region forms a buried E-mode Schottky contact with the barrier layer. An alternative embodiment couples the gate contact of the D-mode transistor to a first layer that overlies the barrier layer, and provides a similar D-mode amorphized region within the first layer. |
申请公布号 |
WO2005055322(A1) |
申请公布日期 |
2005.06.16 |
申请号 |
WO2004US35609 |
申请日期 |
2004.10.26 |
申请人 |
TRIQUINT SEMICONDUCTOR, INC.;WOHLMUTH, WALTER A. |
发明人 |
WOHLMUTH, WALTER A. |
分类号 |
H01L21/8234;H01L21/8252;H01L27/06;H01L27/088 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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