发明名称 DIGITALER SIGNALPROZESSOR ZUR REDUZIERUNG DES ZUGRIFFSWETTBEWERBS
摘要 <p>A circuit for digital signal processing calls for the use of a variable length instruction set. An exemplary DSP includes a set of three data buses (108, 110, 112) over which data may be exchanged with a register bank (120) and three data memories (102, 103, 104). A register bank (120) may be used that has registers accessible by at least two processing units (128, 130). An instruction fetch unit (156) may be included that receives instructions of variable length stored in an instruction memory (152). The instruction memory (152) may be separate from the set of three data memories (102, 103, 104).</p>
申请公布号 AT297567(T) 申请公布日期 2005.06.15
申请号 AT19990911150T 申请日期 1999.03.04
申请人 QUALCOMM INCORPORATED 发明人 SIH, GILBERT, C.;ZOU, QUIZHEN;JHA, SANJAY, K.;KANG, INYUP;LIN, JIAN;MOTIWALA, QUAEED;JOHN, DEEPU;ZHANG, LI;ZHANG, HAITAO;LEE, WAY-SHING;SAKAMAKI, CHARLES, E.;KANTAK, PRASHANT, A.
分类号 G06F9/30;G06F9/32;G06F9/38;G06F12/08;G06F15/78;(IPC1-7):G06F9/30 主分类号 G06F9/30
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