| 摘要 |
An object of the present invention is to provide a non-volatile ferroelectric memory device, which eliminates leakage-related transistor memory retention degradation. A ferroelectric memory transistor according to the present invention comprises: a substrate having a source region (54), a gate region (58), and a drain region (56); a gate stack (60) located on the gate region, including: a high-k insulator element (62), including a first high-k cup (62L) and a second high-k cup (62U); a ferroelectric element (64), wherein said ferroelectric element is encapsulated within said high-k insulator element (62); and a top electrode (66) located on a top portion of said high-k insulator element; a passivation oxide layer (68) located over the substrate and gate stack; and metalizations (70,74,72) to form respective contacts to the source region, the drain region and the gate stack. <IMAGE> |
