发明名称 Enhanced highly pipelined bus architecture
摘要 A bus agent that may be used in an enhanced highly pipelined bus architecture. In one embodiment, the bus agent includes a control interface to drive a control signal at a clock frequency, an address bus interface to drive address elements at twice the clock frequency, and a data bus interface to drive data elements at four times the clock frequency. The address bus interface drives a substantially centered address strobe transition for each address element, and the data bus interface drives a substantially centered data strobe transition for each data element.
申请公布号 US6907487(B2) 申请公布日期 2005.06.14
申请号 US20010783852 申请日期 2001.02.14
申请人 INTEL CORPORATION 发明人 SINGH GURBIR;GREINER ROBERT J.;PAWLOWSKI STEPHEN S.;HILL DAVID L.;PARKER DONALD D.
分类号 G06F13/36;G06F13/42;(IPC1-7):G06F13/14 主分类号 G06F13/36
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