发明名称 Method for fabricating a vertical bipolar junction transistor
摘要 A semiconductor wafer includes a first doping region of a first conductivity type, a second doping region of a second conductivity type, and a plurality of isolated structures positioned on surfaces of the first doping region and the second doping region. A third doping region of the first conductivity type is formed in an upper portion of the second doping region. A shielding layer is formed and a portion of the shielding layer is removed to form an opening shielding layer to expose a portion of the third doping region. Subsequently, a doping layer of the second conductivity type is formed on a surface of the third doping region. A self-aligned silicidation process is performed to form a silicide layer on the surfaces of the second doping region, the third doping region and the doping layer, the silicide layer functioning as a contact region of a vertical bipolar junction transistor.
申请公布号 US6905935(B1) 申请公布日期 2005.06.14
申请号 US20030707260 申请日期 2003.12.02
申请人 UNITED MICRELECTRONICS CORP. 发明人 GAU JING-HORNG;CHEN ANCHOR
分类号 H01L21/331;H01L29/08;H01L29/732;(IPC1-7):H01L21/331 主分类号 H01L21/331
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