| 摘要 |
A system, method and program product for designing integrated circuits. A design of an integrated circuit (IC) is analyzed to identify the longest path between each pair of registers. A crosstalk overhead is calculated for each identified longest path using a stochastic model. The crosstalk overhead of each longest path is added to selected path delays as an incremental port of register set up time. Any path wherein the sum of the path delay and crosstalk overhead exceeds a maximum accepted delay, i.e., where slack is less than or equal to zero is redesigned and the IC is then, placed and wired. The stochastic model may be a tree-like structure derived from several completed integrated circuit (IC) designs, in particular from cell placement and wiring for the completed IC. The tree-like stochastic model corresponds crosstalk delays to technology wire factors.
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