发明名称 |
Methods for manufacturing semiconductor device |
摘要 |
Methods of forming a silicide layer with small grain boundary size on a source/drain region of semiconductor device are disclosed. A disclosed method comprises forming a gate insulating layer and a gate electrode on an active region of a semiconductor substrate; forming spacers on the sidewalls of the gate electrode; implanting impurity ions for a source/drain region at a high concentration by using the gate electrode and the spacers as an ion implantation mask; depositing an interlayer dielectric layer over the semiconductor substrate including the gate electrode and the spacers; forming contact holes through the interlayer dielectric layer; depositing a barrier metal layer for silicide layers along the top surface of the interlayer dielectric layer and along the sidewalls and the bottoms of the contact holes; and performing a thermal treatment process to complete a source/drain region in the active region and form silicide layers on the source/drain region and the gate electrode.
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申请公布号 |
US2005124128(A1) |
申请公布日期 |
2005.06.09 |
申请号 |
US20040008524 |
申请日期 |
2004.12.08 |
申请人 |
KIM HAG D. |
发明人 |
KIM HAG D. |
分类号 |
H01L21/28;H01L21/336;H01L29/49;H01L29/78;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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