发明名称 |
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To prevent increase of the number of dual damascene processes for forming a via hole prior to formation of a wiring groove. SOLUTION: The inner part of the via hole 34 is filled with an organic SOG film 35 prior to a process for forming the wiring groove after the via hole 34 is formed in an interlayer insulating film 30. An inorganic SOG film 36 having ashing resistance is formed on the upper part of the organic SOG film 35. Adjustment deviation occurs in a photoresist film for forming wiring groove 27A. When resist reproduction is required, occurrence of damage is prevented in the organic SOG film 35 scarce in ashing resistance at the time of removing the photoresist film 27A by ashing. COPYRIGHT: (C)2005,JPO&NCIPI
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申请公布号 |
JP2005150268(A) |
申请公布日期 |
2005.06.09 |
申请号 |
JP20030383299 |
申请日期 |
2003.11.13 |
申请人 |
RENESAS TECHNOLOGY CORP |
发明人 |
NOGUCHI JUNJI;AOKI HIDEO;HOTTA SHOJI;OSHIMA TAKAFUMI |
分类号 |
H01L21/768;(IPC1-7):H01L21/768 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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