| 发明名称 |
Translation lookaside buffer prediction mechanism |
| 摘要 |
According to one embodiment a central processing unit (CPU) is disclosed. The CPU includes a translation lookaside buffer (TLB). The TLB predicts a set index value prior to the generation of an effective address.
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| 申请公布号 |
US2005125628(A1) |
申请公布日期 |
2005.06.09 |
| 申请号 |
US20030726885 |
申请日期 |
2003.12.03 |
| 申请人 |
MORROW MICHAEL W.;O'CONNOR DENNIS M.;IYADURAI DESIKAN |
发明人 |
MORROW MICHAEL W.;O'CONNOR DENNIS M.;IYADURAI DESIKAN |
| 分类号 |
G06F12/10;(IPC1-7):G06F12/08 |
主分类号 |
G06F12/10 |
| 代理机构 |
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| 地址 |
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