发明名称 Nonvolatile memory with spacer trapping structure
摘要 The present invention discloses a nonvolatile memory with spacer trapping structure, the nonvolatile memory comprising a semiconductor substrate. A gate oxide is formed on the semiconductor substrate. A gate structure is formed on the gate oxide. An isolation layer is formed over the sidewall of the gate structure. First spacers are formed on the sidewall of the isolation layer and becoming the spacer trapping structure for storing carrier. And the p-n junctions of source and drain regions are formed adjacent to the gate structure. Salicide is formed on the gate structure and the source and drain regions.
申请公布号 US2005121715(A1) 申请公布日期 2005.06.09
申请号 US20030731517 申请日期 2003.12.09
申请人 JENG ERIK S. 发明人 JENG ERIK S.
分类号 H01L21/265;H01L21/336;H01L29/10;H01L29/49;(IPC1-7):H01L21/336 主分类号 H01L21/265
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