| 摘要 |
PROBLEM TO BE SOLVED: To obtain a semiconductor device employing a porous low dielectric constant film, in which occurrence of stripping or cracking of the low dielectric constant film is suppressed, when embedded wiring is formed by chemical mechanical polishing, and variations in sheet resistance of wiring or inter-line capacitance due to erosion of chemical mechanical polishing is reduced. SOLUTION: Between high density wiring 13 and isolated wiring 14 formed on a via insulating film, a dummy pattern is arranged to include at least one T-shaped orthogonal pattern consisting of at least two line patterns intersecting perpendicularly; and by making the entire pattern density of the high-density wiring pattern 13, the isolated wiring 14 and the dummy pattern 16 uniform on a semiconductor substrate, stripping or cracking of the low dielectric constant film, caused by a shearing stress being applied thereto, are suppressed; and the variation in wiring and film thickness of an interlayer insulating film is reduced, when embedded wiring is formed by chemical mechanical polishing. COPYRIGHT: (C)2005,JPO&NCIPI
|
