摘要 |
An on-chip loop filter includes a 1<SUP>st </SUP>resistor, a 1<SUP>st </SUP>capacitor, a 2<SUP>nd </SUP>capacitor, a 3<SUP>rd </SUP>capacitor, a 2<SUP>nd </SUP>resistor, and a 4<SUP>th </SUP>capacitor. The 1<SUP>st </SUP>resistor is operably coupled to receive a charge pump output. The 1<SUP>st </SUP>capacitor is coupled in series with the 1<SUP>st </SUP>resistor where the second node of the 1<SUP>st </SUP>capacitor is coupled to a return. The 2<SUP>nd </SUP>capacitor is coupled in parallel with the series combination of the 1<SUP>st </SUP>resistor and 1<SUP>st </SUP>capacitor. The 3<SUP>rd </SUP>capacitor is coupled in parallel with the 2<SUP>nd </SUP>capacitor. The 2<SUP>nd </SUP>resistor is coupled to a node of the 3<SUP>rd </SUP>capacitor and to a node of the 4<SUP>th </SUP>capacitor. The other node of the 4<SUP>th </SUP>capacitor is coupled to ground. To enable these components to be placed on-chip, the 1<SUP>st </SUP>capacitor is of a 1<SUP>st </SUP>capacitor construct having a 1<SUP>st </SUP>quality factor, the 2<SUP>nd </SUP>capacitor is of a 2<SUP>nd </SUP>capacitor construct having a 2<SUP>nd </SUP>quality factor, where the 2<SUP>nd </SUP>quality factor is greater than the 1<SUP>st </SUP>quality factor, and the 3<SUP>rd </SUP>and 4<SUP>th </SUP>capacitors are of a 3<SUP>rd </SUP>capacitor construct having a 3<SUP>rd </SUP>quality factor, which is greater than the 2<SUP>nd </SUP>quality factor.
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