发明名称 SERIAL PERIPHERAL INTERFACE (SPI) APPARATUS WITH WRITE BUFFER FOR IMPROVING DATA THROUGHPUT
摘要 <p>A serial peripheral interface apparatus (200) has a second parallel write buffer (250) to load in a subsequent data byte (DataInBus &lt;7:0&gt;) while a current data byte (DO &lt;7:0&gt;) is being transferred through a pair of serial shift registers and avoid write collision. A load enable (LoadSerSlv), controlling transfer from the second parallel write buffer to the shift registers, becomes favorable when a bit counter counts the first half of the serial transfer of the previous data set. Thus, the second parallel write buffer avoids the stretching the master clock and improves data throughput of the system.</p>
申请公布号 WO2005052776(A1) 申请公布日期 2005.06.09
申请号 WO2004US37576 申请日期 2004.11.12
申请人 ATMEL CORPORATION 发明人 LAMBRACHE, EMIL;FROEMMING, BENJAMIN, F.
分类号 G06F13/40;G06F3/00;G06F13/00;(IPC1-7):G06F3/00 主分类号 G06F13/40
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