发明名称 Open drain input/output structure and manufacturing method thereof in semiconductor device
摘要 The present invention relates to an open drain input/output structure and manufacturing method thereof in which a n-channel depletion transistor for pull-up resistance can be used like an enhancement transistor without impurity ion implantation process when being formed an open drain input/output terminal. An open drain input/output structure in a semiconductor device according to the present invention includes: a gate formed with an enhancement transistor at a predetermined portion on a first conductive-type semiconductor substrate which is formed with a gate insulating layer; a second conductive-type source/drain region formed in the semiconductor substrate at the both sides of the gate; and a second conductive-type impurity implantation region formed at a predetermined portion of a channel region at the lower part of the gate so as to selectively connected to the source region or the drain region. Therefore, according to the present invention, because the gate length of a n-channel depletion transistor is designed to have longer than conventional ones' so as to changed a depletion transistor into an enhancement transistor there is no necessary an impurity ion implantation process after gate forming process when an open drain I/O is achieved. Therefore, all a pull-up resistance I/O and an open drain I/O of a mask ROM embedded MCU, EPROM embedded MCU can be achieved with the same lay out structure thereby to be compatible when being manufactured MCU.
申请公布号 US2005124119(A1) 申请公布日期 2005.06.09
申请号 US20050039970 申请日期 2005.01.20
申请人 SHIM BYUNG-SUP;KIM YOUNG-HO 发明人 SHIM BYUNG-SUP;KIM YOUNG-HO
分类号 H01L27/102;H01L21/8234;H01L27/088;H01L29/10;H01L29/78;(IPC1-7):H01L21/823 主分类号 H01L27/102
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