| 摘要 |
PROBLEM TO BE SOLVED: To provide an FSK signal detector capable of detecting an FSK signal through a digital processing with a simple circuit configuration. SOLUTION: An FSK signal 50 is binarized by a comparator 12 and input to a 2n-stage shift register 14. In the 2n-stage shift register 14, the FSK signal is sequentially input and FSK signals of 1st to n-th stages are output to an adder 18, and FSI signals of registers from an (n+1)th stage to a 2n-th stage are output to the adder 18 via inverters 16-1 to 16-n. In the adder 18, the total number of FSK signals each having a value of "1" in the input FSK signals is calculated and a frequency detection output 64 is output. In an adder 20, -n is added to the frequency detection output 64 and a frequency detection output 68 is output. Furthermore, in an absolute value converting part 22, an absolute value of the frequency detection output 68 is calculated and a frequency detection output 70 is output. In a digital LPF 24, the frequency detection output 70 is averaged and a frequency detection output 72 is output. In a comparator 26, the frequency detection output 72 is compared to a threshold 74 and FSK data 76 are generated. COPYRIGHT: (C)2005,JPO&NCIPI
|
