| 摘要 |
Based on a given DCT algorithm developed before, a processing memory of a special structure is used to facilitate resource sharing. Accordingly, it is intended to reductions in the number of members required, function block areas, and power consumption, and further intended to accelerate processing speed, and reduce output latency. This apparatus is a DCT processor used for implementing discrete cosine transform, including: a storage and processing module for permutating data; and a computing module for computing data in accordance with a given DCT algorithm, wherein data is looped at a given number of times between the storage and processing module and the computing module, and a result of discrete cosine transform is obtained based on data read out of output units of the computing module. <IMAGE>
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