Frequency and phase correction in a phase-locked loop

摘要

In one embodiment, a system for frequency and phase correction in a phase-locked loop (PLL) 10 includes a phase frequency detector 12, first and second charge pumps respectively generating a first current and a voltage, a voltage-to-current (V2I) converter, a current summer 16, and a current-controlled oscillator (CCO) 18. The phase frequency detector 12 detects a frequency difference and a phase difference between a clock signal and a comparison signal, communicates the frequency difference to a first charge pump generating a first current, and communicates the phase difference to a second charge pump generating a voltage. The comparison signal is derived from an output signal of the PLL 10. The first charge pump modifies the first current according to the frequency difference and communicates the first current to the current summer 16. The second charge pump modifies the voltage according to the phase difference and communicates the voltage to the V2I converter. The V2I converter generates a second current corresponding to the voltage and communicates the second current to the current summer 16. The current summer 16combines the first and second currents with each other to generate a control current for the CCO and communicates the control current to the CCO 18. The CCO 18 generates one or more oscillating signals according to the first and second currents. A frequency of an oscillating signal from the CCO 18 changes in response to the modification of the first current, and a phase of the oscillating signal changes in response to the modification of the second current. <IMAGE>