发明名称 |
INTEGRATED CIRCUIT ARRANGEMENT COMPRISING CAPACITORS AND PREFERABLY PLANAR TRANSISTORS, AND PRODUCTION METHOD |
摘要 |
Disclosed is an integrated circuit arrangement (140), among others, comprising a preferably planar transistor (142) and a capacitor (144). The lower electrode of the capacitor (144) is disposed within an SOl substrate along with a channel section of the transistor (142). The inventive circuit arrangement (140) is easy to produce and has excellent electronic properties.
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申请公布号 |
KR20050053780(A) |
申请公布日期 |
2005.06.08 |
申请号 |
KR20057006707 |
申请日期 |
2005.04.18 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
BREDERLOW RALF;HARTWICH JESSICA;PACHA CHRISTIAN;ROESNER WOLFGANG;SCHULZ THOMAS |
分类号 |
H01L21/8242;H01L21/84;H01L27/108;H01L27/12;(IPC1-7):H01L27/12 |
主分类号 |
H01L21/8242 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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