发明名称 Semiconductor memory device having twin-cell units
摘要 Each of twin-cell units each formed of two DRAM cells has a cell plate electrically isolated from the cell plates in the other twin-cell units. Thereby, voltages on two storage nodes storing mutually complementary data in the same twin-cell unit change similarly to each other owing to capacitive coupling.
申请公布号 US6903961(B2) 申请公布日期 2005.06.07
申请号 US20030606240 申请日期 2003.06.26
申请人 RENESAS TECHNOLOGY CORP. 发明人 TSUKIKAWA YASUHIKO;ITO TAKASHI
分类号 H01L27/108;G11C7/18;G11C11/401;G11C11/404;G11C11/405;G11C11/4097;H01L21/8242;H01L27/02;(IPC1-7):G11C11/24 主分类号 H01L27/108
代理机构 代理人
主权项
地址