Method for defining alignment marks in a semiconductor wafer

摘要

A lithography and etching method for forming an alignment mark ( 104 ) and at least one device feature (such as a shallow trench 105 ) on a wafer ( 99 ) is provided. The etching process ( 18 ) comprises: a first etching step ( 1811 ) for pre-defining at least one alignment mark ( 103 ) and a second etching step ( 1812 ) for defining desired semiconductor device patterns (such as a shallow trench 105 ) on said wafer surface and completing said at least one alignment mark ( 104 ).