发明名称 |
Semiconductor devices, capacitor antifuses, dynamic random access memories, and cell plate bias connection methods |
摘要 |
In one aspect, a semiconductor device includes an array of memory cells. Individual memory cell of the array include a capacitor having first and second electrode, a dielectric layer disposed between the first and second electrodes. Select individual capacitors are energized so as to blow the dielectric layer to establish a connection between the first and second electrodes such that, after blowing the dielectric layer, the second electrode is coupled to a cell plate generator establish a bias connection therebetween. Cell plate bias connection methods are also described.
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申请公布号 |
US6903437(B1) |
申请公布日期 |
2005.06.07 |
申请号 |
US20040753914 |
申请日期 |
2004.01.07 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
MANNING H. MONTGOMERY |
分类号 |
G11C5/00;G11C11/4074;G11C17/16;G11C17/18;H01L23/525;H01L27/108;H01L29/00;(IPC1-7):H01L29/00 |
主分类号 |
G11C5/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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