发明名称 Method and system for placing logic nodes based on an estimated wiring congestion
摘要 A method and system for placing logic nodes based on an estimated wiring congestion are provided. Specifically, under the present invention, relative probabilities for potential implementations of wiring interconnects between logic nodes are determined. Then, for each edge between adjacent bins, a total of corresponding relative probabilities is compared to a wiring availability. Based on the comparison, the logic nodes can be placed within wiring constraints.
申请公布号 US6904584(B2) 申请公布日期 2005.06.07
申请号 US20020063633 申请日期 2002.05.06
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BRENNER ULRICH;HONSINGER PHILIP S.;KOEHL JUERGEN;KORTE BERNHARD;ROHE ANDRE;VYGEN JENS P.
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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