| 摘要 |
A ceramic capacitor with a low-profile leadframe. The ceramic capacitor comprises a multiplicity of parallel plates in planar relationship. Each plate terminates at opposing faces in an alternating pattern. A dielectric is between the parallel plates. Two external terminations are on opposing sides of the capacitor wherein each external termination is in electrical contact with alternating plates of the multiplicity of parallel plates. The bottom half of the ceramic capacitor including the external terminations is treated with an insulative coating prior to attachment to a leadframe. The noninsulated portions of the terminations are attached to the leadframe and the insulator prevents the leadframe from attaching to the lower vertical faces of the terminations. The leadframe in this manner creates no excessive distance between the chip and the PCB surface, thus reducing inductance and resistance.
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