| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory device in which data destruction can be prevented without delaying write-operation. SOLUTION: This memory device has a data take-in gate (GD1) for buffering inputted data in a first buffer, a data transfer gate (GD2) for inputting the data of the first buffer and buffering it in a second buffer, a data write-gate (GD3) for outputting the data of the second buffer to a data bus, and a memory cell for storing data on the data bus as WRITE. A control circuit inputs data to the second buffer by control of the data transfer gate without inputting data to the first buffer by control of the data capturing gate in accordance with a time from activation of a write-enable signal to change of a data mask signal. COPYRIGHT: (C)2005,JPO&NCIPI
|
