发明名称 Wafer processing method and wafer processing apparatus
摘要 There are provided a wafer processing method comprising the steps of grinding an underside ( 21 ) of a wafer which is provided, on its front surface ( 29 ), with a plurality of semiconductor devices ( 10 ); polishing a ground surface ( 22 ) formed by the grinding operation; and carrying out a plasma-processing for a polished surface ( 23 ) formed by the polishing operation under a predetermined gaseous atmosphere in a plasma chamber, to form an oxide layer on the polished surface, and a wafer processing method comprising the steps of carrying out a first plasma-processing for a polished surface formed by the polishing operation under a first gaseous atmosphere (CF<SUB>4 </SUB>or SF<SUB>6</SUB>) in a plasma chamber, to clean the polished surface; and carrying out a second plasma-processing for the polished surface after the cleaning operation under a second gaseous atmosphere (O<SUB>2</SUB>) in the plasma chamber, to form an oxide layer on the polished surface, and a wafer processing apparatus for carrying out these methods. Thus, the wafer can be processed while the occurrence of an electrical failure in a thin wafer is restricted.
申请公布号 US2005118823(A1) 申请公布日期 2005.06.02
申请号 US20040981081 申请日期 2004.11.03
申请人 KAWASHIMA ISAMU 发明人 KAWASHIMA ISAMU
分类号 H01L21/304;H01L21/301;H01L21/306;H01L21/3065;H01L21/316;(IPC1-7):H01L21/302;H01L21/461 主分类号 H01L21/304
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