| 摘要 |
<P>PROBLEM TO BE SOLVED: To effectively generate addresses for continuous access in row and column directions in a memory test. <P>SOLUTION: An address conversion section 302 selectively outputs input data 304 from a counter 301 or data obtained by changing the bit arrangement of the input data. When the input data is output without conversion, selectors 501 to 506 respectively select input bit lines 507 to 512. On the other hand, when the data obtained by changing the bit arrangement is output, the selectors 501 to 506 respectively select the input bit lines 512, 511, 510, 509, 508, and 507. Thus, according to a control signal 303, without converting the input data 304 from the counter, or converted data replaced symmetrically around data for the bit arrangement of the input data 304 is output as an address 305. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
