| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory control unit in which a synchronous memory is controlled without using a clock signal or with minimum use of the signal, and an electronic device using the control unit. SOLUTION: A synchronous-signal generation circuit 22 generates a synchronous signal for a synchronous memory from an asynchronous access signal. A main access circuit 24 generates a command satisfying a timing relation necessary for the synchronous signal. An auxiliary access circuit 26 alternatively performs generation of an access signal for data processors other than a host CPU. A RAM 30 is a synchronous memory. Since the synchronous access signal is generated in the synchronous-signal generation circuit 22 and the auxiliary access circuit 26, access to the synchronous memory is effectively ensured while it appears to the external that an asynchronous memory is controlled. COPYRIGHT: (C)2005,JPO&NCIPI
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