Method for limiting potential at collector of switchable power semiconductor switch, e.g. insulated gate bipolar transistor (IGBET), MOSFET, hard driven gat turn (HDGTO) of thyristor etc., to preset value

摘要

Potential limiting of switchable power semiconductor switch (T10,20,30) during switch-off, to preset value is carried out by invented method. In dependence of detected potential course of collector voltage (11c) is determined actual voltage steepness.This steepness is so compared with preset rated voltage steepness values that energizing signal (Usz) is generated, when collector voltage exceeds preset value of one of two rated voltage steepnesses. Independent claims are included for collector potential limiter for IGBT etc.