发明名称 Transistor structure, memory cell, DRAM, and method for fabricating a transistor structure in a semiconductor substrate
摘要 Transistor structures, with one source/drain region connected to a charge storage device to be insulated includes an asymmetric gate conductor structure. At a first side wall, which faces the one source/drain region, the asymmetric gate conductor structure has a side wall oxide with a greater thickness and a bird's beak structure with a greater length than at an opposite, second side wall. An effective channel length is increased for the same feature size of the gate conductor structure. Memory cells can be realized in a higher density.
申请公布号 US2005116293(A1) 申请公布日期 2005.06.02
申请号 US20040975085 申请日期 2004.10.28
申请人 GOLDBACH MATTHIAS;FREY ULRICH;FISCHER BJORN 发明人 GOLDBACH MATTHIAS;FREY ULRICH;FISCHER BJORN
分类号 H01L21/336;H01L21/8242;H01L29/423;(IPC1-7):H01L27/01 主分类号 H01L21/336
代理机构 代理人
主权项
地址