Processor system with execution-reservable accelerator

摘要

A processor system capable of performing high-speed image processing is provided. The processor system includes a CPU and an accelerator. The CPU connected to the accelerator issues reservations of activation requests to said accelerator. The accelerator has an issued request number counter for counting the number of requests issued by the CPU and a processed request number counter for counting the number of processed requests. The accelerator can activate itself when a counter value of the issued request number counter is larger than a counter value of the processed request number counter.