发明名称 PROCESS AND INTEGRATION SCHEME FOR FABRICATING CONDUCTIVE COMPONENTS THROUGH-VIAS AND SEMICONDUCTOR COMPONENTS INCLUDING CONDUCTIVE THROUGH-WAFER VIAS
摘要 A method for forming a conductive via in a semiconductor component is disclosed. The method includes providing a substrate (112) having a first surface and an opposing, second surface. At least one hole (118) is formed in the substrate extending between the first surface and the opposing, second surface. A seed layer (128) is formed on a sidewall defining the at least one hole of the substrate and coated with a conductive layer (130), and a conductive or nonconductive filler material (136) is introduced into the remaining space within the at least one hole. A method of forming a conductive via through a substrate using a blind hole is also disclosed. Semiconductor components and electronic systems having substrates including the conductive via of the present invention are also disclosed.
申请公布号 WO2005031811(A3) 申请公布日期 2005.06.02
申请号 WO2004US30946 申请日期 2004.09.21
申请人 MICRON TECHNOLOGY, INC.;SINHA, NISHANT 发明人 SINHA, NISHANT
分类号 H01L21/768;H01L23/48 主分类号 H01L21/768
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