发明名称 MULTI-CHIPS PACKAGE STRUCTURE
摘要 PROBLEM TO BE SOLVED: To improve the affection of characteristics loss or the like by a method wherein the reduction of a wiring density and the shortening of length of a wire bonding are permitted without complicating wire bonding wiring between a pad and a lead frame, while permitting the provision of a bonding pad on all of the sides of a semiconductor element with respect to a multi-chips package module structure which mounts a plurality of pieces of semiconductor elements in the same package, and, further, the rise of a resistance is prevented from a semiconductor element pad to an external lead terminal. SOLUTION: Respective semiconductor elements 2, 3 are arrayed in zigzag so that respective sides will not be opposed mutually as the mounting configuration of two pieces of semiconductor elements 2, 3 mounted in the same package, while respective sides of the semiconductor elements 2, 3 are arranged so as to be in parallel to the arraying direction of the external lead terminals in order to avoid the complication of the wire bonding wiring. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005142426(A) 申请公布日期 2005.06.02
申请号 JP20030378473 申请日期 2003.11.07
申请人 SHARP CORP 发明人 FUJII SATORU;ISODA HIROSHI;NISHINAKAGAWA KENJI
分类号 H01L23/50;(IPC1-7):H01L23/50 主分类号 H01L23/50
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