| 摘要 |
A logic enhanced memory that may be used in a video graphics system is presented. The logic enhanced memory includes an operation block that performs a number of operations on a block-by-block basis such that parallel processing results. The operations performed by the operation pipeline include blending operations for fragment blocks received from a graphics processing circuit, where the fragment blocks include pixel fragments generated by rendering graphics primitives. Other operations include selective reads and writes to the memory array, clearing functions, and swapping functions. Mask values included in the commands executed to control the operation pipeline allow for selectivity with respect to portions of the data packets, or blocks, to which the operations are applied.
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