发明名称 Method for reducing multiline effects on a printed circuit board
摘要 A method is provided for designing a printed circuit board. This may include analyzing at least one characteristic of a first plurality of relatively parallel conductive paths on the printed circuit board. The first plurality of relatively parallel conductive paths may be arranged in a pattern in a first area of the printed circuit board. The method may also include rearranging the pattern of conductive paths such that a second plurality of relatively parallel conductive paths in a second area of the printed circuit board have a different geometry or arrangement with respect to one another as compared to a geometry or arrangement of the first plurality of relatively parallel conductive paths in the first area.
申请公布号 US6898844(B2) 申请公布日期 2005.05.31
申请号 US20010964810 申请日期 2001.09.28
申请人 INTEL CORPORATION 发明人 OLSEN CHRISTOPHER N.
分类号 H05K1/02;H05K3/00;H05K3/42;(IPC1-7):H01R43/00 主分类号 H05K1/02
代理机构 代理人
主权项
地址