ESD protection with uniform substrate bias

摘要

Protection circuitry ( 100 ) for protecting an integrated circuit against an ESD pulse is provided. The protection circuitry ( 100 ) includes a discharge circuitry ( 101 ) on a substrate ( 106 ) that discharges an ESD pulse to the integrated circuit to ground ( 104 a). The protection circuitry ( 100 ) also includes a drive circuitry ( 102 ) that uses a portion of the ESD pulse voltage to bias the substrate ( 106 ) using a first guard ring ( 110 ) in the substrate ( 106 ), which surrounds the discharge circuitry ( 101 ) and drive circuitry ( 102 ). The protection circuitry ( 100 ) further includes a second guard ring ( 120 ) in substrate ( 106 ), which surrounds the first guard ring ( 110 ) and connects to Vss/ground potential ( 104 c), thereby providing uniformity of the substrate bias.