| 摘要 |
The present invention may provide a digital memory circuit comprising a plurality of multi-bit registers, a memory circuit interface, and a logic circuit. The memory circuit interface may be configured to access a selected one of the registers. The logic circuit may be coupled to the plurality of multi-bit registers and responsive to data received through the interface for selectively writing a predetermined logic state to at least one first bit of the selected register while leaving at least one second bit in the selected register with an unmodified state.
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