发明名称 MULTICHIP WAFER LEVEL SYSTEM PACKAGES AND METHODS OF FORMING SAME
摘要 The present invention defines a packaging implementation providing a multichip multilayer system on a chip solution. Greater integration of a plurality and variety of known good die contained within cavities formed in a separate substrate is achieved. Additional redistribution and interconnect layers above the multichip configuration may be formed with the redistribution layers terminating in electrical connections such as conductive bumps or balls. In one embodiment, the substrate cavities receive signal device connections, such as conductive bumps, of a plurality of semiconductor dice in a flip-chip configuration. A portion of the substrate's back surface is then removed to a depth sufficient to expose the conductive bumps. In another embodiment, the cavities receive the semiconductor dice with their active surface facing up, wherein metal layer connections are formed and coupled to bond pads or other electrical connectors of the semiconductor dice. Computing systems incorporating the packaging are also disclosed.
申请公布号 SG111086(A1) 申请公布日期 2005.05.30
申请号 SG20020006004 申请日期 2002.10.03
申请人 MICRON TECHNOLOGY, INC. 发明人 CHUA SWEE KWANG;LOW SIU WAF;CHIA YONG POO;ENG MEOW KOON;NEO YONG LOO;BOON SUAN JEUNG;HUANG SHUANG WU;ZHOU WEI
分类号 H01L21/60;H01L23/498;H01L23/538 主分类号 H01L21/60
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