发明名称 Phase detector system with asynchronous output override
摘要 In one embodiment, the present invention provides a phase-locked loop comprising a charge-pump loop filter and a phase detector system. The charge-pump loop filter is configured to provide a control voltage having a voltage level based on a state of a first control signal and on a state of a second control signal. The phase detector system is configured to receive a first clock, a second clock, and a control signal defining a plurality of states including a first state and a second state. The phase detector system is further configured to provide the first control signal and the second control signal each having a state based on a phase difference between the first and second clocks when the control signal has the first state, and to provide the first control signal and second control signal each having a state asynchronously controlled by the control signal when the control signal has the second state.
申请公布号 US2005111607(A1) 申请公布日期 2005.05.26
申请号 US20030718206 申请日期 2003.11.20
申请人 LOKE ALVIN L.S.;BARNES ROBERT K.;BARNES JAMES O. 发明人 LOKE ALVIN L.S.;BARNES ROBERT K.;BARNES JAMES O.
分类号 H03D13/00;H03L7/089;H03L7/107;(IPC1-7):H03D3/24 主分类号 H03D13/00
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