SEMICONDUCTOR INTEGRATED CIRCUIT AND WIRING DESIGN METHOD THEREOF

摘要

PROBLEM TO BE SOLVED: To improve controllability and to improve yield in fine work of a semiconductor integrated circuit by securing the density of wiring vias and securing the regularity and uniformity of a layout pattern, in a plurality of wiring layers having wiring patterns and a relay wiring layer having a plurality of vias connecting the wiring layers in wiring design of the semiconductor integrated circuit. SOLUTION: Design is performed on the basis of two basic wiring pattern layers where regularity is previously given and the wiring patterns are formed and on a basic via array layer which is positioned between the layers, and in which the vias are formed by previously giving regularity. Thus, the facility and reliability of a work are improved in a manufacture process and products. COPYRIGHT: (C)2005,JPO&NCIPI