发明名称 Multi-chip package type memory system
摘要 A multichip package type memory system is disclosed, which comprises a plurality of types of memory integrated circuits which are provided in a memory system in a package having an internal bus, and accessed from exterior of the package and/or within the package, and a controlling integrated circuit which is provided in the memory system in the package, and when an instruction of data transfer within the memory system is received from exterior of the package, controls an execution of the data transfer to be executed within the memory system such that data of memory cells at addresses of a first memory integrated circuit are read out, and the readout data are written into memory cells at addresses of a second memory integrated circuit.
申请公布号 US2005114613(A1) 申请公布日期 2005.05.26
申请号 US20040968970 申请日期 2004.10.21
申请人 OTANI TAKAYUKI;SUZUKI TAKASHI 发明人 OTANI TAKAYUKI;SUZUKI TAKASHI
分类号 G06F12/00;G06F13/00;G06F13/28;G11C7/10;G11C11/00;H01L23/52;H01L25/065;H01L25/18;H01L27/06;H01L27/10;(IPC1-7):G06F13/28 主分类号 G06F12/00
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