发明名称 Scan testable first-in first-out architecture
摘要 An electronic device ( 10 ). The device comprises a memory structure ( 12 ), which comprises an integer M of memory word slots. Each memory word slot is operable to store an integer N of bits. The device also comprises a scan storage circuit ( 18 ), operable to receive a scan word having a number of bits less than MxN. The device also comprises control circuitry ( 16 ) for causing successive scan words to be written into the scan storage circuit, for causing successive scan words to be written from the scan storage circuit into the memory structure, and for causing successive scan words to be read from the memory structure into the scan storage circuit.
申请公布号 US2005114612(A1) 申请公布日期 2005.05.26
申请号 US20040828992 申请日期 2004.04.21
申请人 BOMBAL JEROME 发明人 BOMBAL JEROME
分类号 G11C29/00;(IPC1-7):G06F12/00 主分类号 G11C29/00
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