发明名称 DATA TRANSFER CONTROL DEVICE AND IMAGE FORMING APPARATUS
摘要 PROBLEM TO BE SOLVED: To disconnect a CPU bus from a local bus during DMA transfer and to allow a CPU to access a device on the local bus. SOLUTION: A bus switch 930 is connected between the CPU bus and the local bus. A DMA controller part 910 disconnects the CPU bus from the local bus by the bus switch 930 and performs DMA transfer from an SRAM 982b to a device in an image processing part 20 on the local bus in a burst mode. When an interruption request (NCS_IPS=1) is outputted from the CPU 990 to the image processing part 20, the DMA transfer is stopped and the CPU bus is connected to the local bus by the bus switch 930 to provide the control right of the local bus to the CPU 990. After the stop of the interruption request, the DMA controller part 910 disconnects the CPU bus from the local bus by the bus switch 930 and automatically restarts the DMA transfer from the interrupted position. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005135240(A) 申请公布日期 2005.05.26
申请号 JP20030372010 申请日期 2003.10.31
申请人 FUJI XEROX CO LTD 发明人 AMAYA TADASHI;KISHIMOTO HAJIME;KOYANAGI KATSUYA;ARAI NORIKO;FURUYAMA KENJI;YOKOMORI TOMIO;SATO ATSUSHI
分类号 B41J29/38;G06F13/28;(IPC1-7):G06F13/28 主分类号 B41J29/38
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