发明名称 |
Digital modulation circuit and method as well as digital demodulation circuit and method |
摘要 |
A mixer circuit accumulates I signal (digital signal of first channel) having its band limited by low-pass filter and first carrier signal to perform two-phase shift keying modulation thereon. An adder adds fundamental-wave component of bit clock signal BCK into Q signal (digital signal of second channel) having its band limited by the another low-pass filter to obtain a resultant added-up signal. Another mixer circuit accumulates the added-up signal and second carrier signal to perform two-phase shift keying modulation thereon. Output signals of the mixer circuits are input to another adder so that they may be added up to obtain a QPSK signal as a modulated quadrature signal. The QPSK signal contains frequency signals whose frequencies are a sum of bit clock frequency and carrier frequency and a difference between them. When demodulating, the carrier signal and the bit clock signal are reproduced using the frequency signals.
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申请公布号 |
US2005111582(A1) |
申请公布日期 |
2005.05.26 |
申请号 |
US20040960120 |
申请日期 |
2004.10.08 |
申请人 |
SONY CORPORATION |
发明人 |
SASAKI KAZUJI;TAKANO MASAYA |
分类号 |
H04L7/00;H04L27/18;H04L27/20;H04L27/22;H04L27/227;(IPC1-7):H04L27/20 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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