| 摘要 |
PROBLEM TO BE SOLVED: To provide an external plating method for semiconductor devices where the variation in the thickness of plating in a lead frame caused by the concentration of electric current is reduced. SOLUTION: In the external plating method for a plurality of semiconductor devices 12 arranged in a grid-shape in a lead frame 9, insulators 2 each having an opening part 3 to which the semiconductor device 12 is exposed are formed on both the sides of the lead frame 9, and the areas of the opening parts 3 are made different depending on the arrangement positions of the semiconductor devices 12 in the lead frame 9. COPYRIGHT: (C)2005,JPO&NCIPI
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