发明名称 |
CLOCK GENERATOR WITH SKEW CONTROL |
摘要 |
Systems and methods are disclosed to provide clock generation. In accordance with one embodiment, a clock generator chip is provided that is configurable and in-system programmable and includes a flexible skew control architecture. The clock generator chip may also provide programmable input circuits, programmable output circuits, and permit a JTAG boundary scan. |
申请公布号 |
WO2005013044(A3) |
申请公布日期 |
2005.05.26 |
申请号 |
WO2004US22994 |
申请日期 |
2004.07.16 |
申请人 |
LATTICE SEMICONDUCTOR CORPORATION |
发明人 |
AGRAWAL, OM;KLEIN, HANS;RICKARD, GEOFFREY;WELLER, HARALD |
分类号 |
G06F1/08;H03L7/18 |
主分类号 |
G06F1/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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