发明名称 |
Semiconductor device and testing circuit which can carries out a verifying test effectively for non-volatile memory cells |
摘要 |
A testing circuit includes m block test units and a first logical processing unit. The block test unit compares a first data outputted from a test object with a reference data, and outputs a result as a test circuit output signal based on a output control signal. The first logical processing unit judges whether the all of m the test circuit output signals indicate that the first data is coincident with the reference data, and outputs a result as a total judgment result signal based on the m test circuit output signals. The block test unit includes a block judging unit and a block output selecting unit. The block judging unit compares the first data with the reference data to judge whether the first data is coincident with the reference data, and outputs a result as a block judgment result signal. The block output selecting unit outputs one of the block judgment result signal and a predetermined standard signal as the test circuit output signal based on the output control signal.
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申请公布号 |
US2005114063(A1) |
申请公布日期 |
2005.05.26 |
申请号 |
US20040765844 |
申请日期 |
2004.01.29 |
申请人 |
NEC ELECTRONICS CORPORATION |
发明人 |
TERAUCHI YOUJI |
分类号 |
G01R31/28;G06F15/78;G11C16/02;G11C29/02;G11C29/12;G11C29/26;G11C29/34;(IPC1-7):G06F19/00 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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